The function of implantable Cardioverter/Defibrillators (ICDs) are now well known in the art. In general, ICDs apply electric pulses or shocks to the heart of a patient to terminate an abnormally rapid heart rate or tachyarrhythmia. Ventricular tachyarrhythmias, including tachycardia and fibrillation, typically involve premature or uncoordinated contraction of the ventricles of the heart which prevents the normal functioning and pumping of the heart. An implanted ICD may also include a pacemaker, to supply the heart with regular or intermittent pacing pulses in order to complement or induce regular heart rhythms.
Once such a device is implanted, the patient nonetheless does not become immune to cardiac difficulties. For one reason or other, despite the proper functioning of the ICD, circumstances may arise which require the use of an external defibrillator. The voltages applied during defibrillation, whether by an implanted device or an external device are very high. An example of a typical voltage level employed by an implanted defibrillator during defibrillation is 750 volts. For defibrillation by an external device, voltages of several thousand volts may be applied. When such a high voltage pulse is applied to the chest of a patient from an external device, and the patient has an ICD, substantial damage may result to the ICD. Accordingly, it is considered prudent to test the ICD following an external defibrillation to determine if replacement may be necessary. There also may be other reasons to test the high voltage (HV) output stage and defibrillation lead integrity such as a suspected lead break.
Many patents have been granted in the field of ICDs. For example, U.S. Pat. No. 5,111,816 has been issued to Benjamin Pless, John G. Ryan, and James M. Culp on a combined defibrillator/pacemaker. The patent shows a system which is able to detect defibrillation lead breaks without delivering a defibrillation pulse to the patient. Pseudounipolar pacing is performed from the pacing capacitors using the high voltage defibrillation leads as the ground return. The lead impedance can be estimated by measuring the initial and final voltages on the pacing capacitors. U.S. Pat. No. 4,164,949 has been granted to Alois A. Langer on the subject of fault detection in a permanently implanted cardioverter or defibrillator. The circuitry of the Langer patent includes built-in interrogation and testing and complex fibrillation detection circuitry used to monitor an ECG signal and to issue a fibrillation detection signal when predetermined characteristics are detected. A characteristic output signal is produced when the fibrillation detector circuit is functioning properly.
Another recent patent, U.S. Pat. No. 5,224,475 was granted to Berg, et al. in 1993 on a method and apparatus for termination of ventricular tachycardia and ventricular fibrillation. According to this patent, an implantable defibrillator is provided with a plurality of defibrillation electrodes which may be reconfigured to define a plurality of defibrillation pathways. The device measures impedance along selected defibrillation pathways and monitors the success or failure of the pulse to accomplish defibrillation or cardioversion. The impedance paths are measured while electric current is applied to the heart of a patient. The teachings of this patent accordingly help optimize the correct positioning of electrodes in the body of a patient to ensure effective defibrillation can be accomplished. The impedance testing performed helps in the optimization process.
However, the patents indicated above are not specifically directed toward determination of the integrity of the output stage and the high voltage leads in the defibrillation circuitry. These patents show approaches in dealing with detection of lead breakage. They disclose complex arrangements to optimize the placement of defibrillation electrodes.
U.S. Pat. application Ser. No. 08/172,510 filed on Dec. 22, 1993 entitled "Implantable Defibrillator Output Stage Test Circuitry and Method" and assigned to the assignee of this present application addresses some of these problems. The method and arrangement according to this patent application permit the checking of the condition of key high voltage output switches of a defibrillator, without application of shocks to the heart of a patient. The defibrillation output stage circuitry, according to one embodiment, includes a resistor connected between internal nodes connected to first and second switches respectively connected to a high voltage capacitive source and ground. The circuitry further includes a second resistor which provides an alternate path to ground which shunts the first resistor and the second switch to ground. By discharging the capacitive voltage source over given time periods, different voltage levels on the voltage source after expiration of the given time periods are indicative of different switch conditions, permitting convenient diagnosis of failed high voltage delivery switches, whether the switches are fused closed or simply fail to open or close at the appropriate times.
Although this invention works effectively for its intended purpose, it does not provide an indication of the integrity of the high voltage defibrillation leads. That is, it does not provide an accurate indication of whether the high voltage leads of the defibrillator are capable of functioning on an ongoing basis without failure. The high voltage lead integrity is a critical factor when delivering the defibrillation therapy to the heart. Accordingly, systems that can determine the high voltage lead integrity along with the integrity of the output stage are very important.
In accordance with the invention, it is an object to ascertain the integrity of selected ICD components to determine whether they are operating properly.
It is an object to test the high voltage lead integrity of the ICD.
It is further an object of the invention herein to detect the condition of ICD circuitry without additional circuitry.
It is further an object of the invention herein to detect the condition of ICD circuitry with the use of conventional ICD circuitry.
These and other advantages of the present invention will become apparent upon reading the following detailed descriptions and studying the various figures of the drawings.